Dynamic reconfiguration technologies based on FPGA in software defined radio system

Partial Reconfiguration (PR) is a method for Field Programmable Gate Array (FPGA) designs which allows multiple applications to time-share a portion of an FPGA while the rest of the device continues to operate unaffected. Using this strategy, the physical layer processing architecture in Software Defined Radio (SDR) systems can benefit from reduced complexity and increased design flexibility, as different waveform applications can be grouped into one part of a single FPGA. Waveform switching often means not only changing functionality, but also changing the FPGA clock frequency. However, that is beyond the current functionality of PR processes as the clock components (such as Digital Clock Managers (DCMs)) are excluded from the process of partial reconfiguration. In this paper, we present a novel architecture that combines another reconfigurable technology, Dynamic Reconfigurable Port (DRP), with PR based on a single FPGA in order to dynamically change both functionality and also the clock frequency. The architecture is demonstrated to reduce hardware utilization significantly compared with standard, static FPGA design

Rapid development of software defined radio : FMCW radar on Zynq SDR

FMCW Radar is a relatively simple radar technology. Here, an FMCW chirp is transmitted, bounces off a surface and reflects back to the receive antenna. The received signal is out of phase with the transmitted signal, due to the additional propagation time. The time difference between the Transmit (Tx) and Receive (Rx) chirps is directly proportional to the distance travelled (distance-speed-time), and by calculating what the time difference is, the propagation distance can be estimated. A standard use case for FMCW radar is Adaptive Cruise Control. The Coffee Can Radar project was originally developed by academics at MIT [1]. As part of a radar course, it aims to have students build FMCW radars from $100 worth of analogue components that are capable of estimating range. These radars do not work in real time, as the received signals need to be processed offline in MATLAB. Using this as a starting point, work was carried out to develop a similar system that could operate in real time using only SDR equipment. A Zynq ZC706 development board was chosen for this task, along with an FMCOMMs 3 radio front end

Using sequence to sequence learning for digital BPSK and QPSK demodulation

In the last few years Machine Learning (ML) has seen explosive growth in a wide range of research fields and industries. With the advancements in Software Defined Radio (SDR), which allows more intelligent, adaptive radio systems to be built, the wireless communications field has a number of opportunities to apply ML techniques. In this paper, a novel approach to demodulation using a Sequence to Sequence (Seq2Seq) model is proposed. This type of model is shown to work effectively with PSK data and also has a number of useful properties that are not present in other machine learning algorithms. A basic Seq2Seq implementation for BPSK and QPSK demodulation is presented in this paper, and learned properties such as Automatic Modulation Classification (AMC), and ability to adapt to different length input sequences, are demonstrated. This is an exciting new avenue of research that provides considerable potential for application in next generation 5G networks

A user configurable data acquisition and signal processing system for high-rate, high channel count applications

Real-time signal processing in plasma fusion experiments is required for control and for data reduction as plasma pulse times grow longer. The development time and cost for these high-rate, multichannel signal processing systems can be significant. This paper proposes a new digital signal processing (DSP) platform for the data acquisition system that will allow users to easily customize real-time signal processing systems to meet their individual requirements. The D-TACQ reconfigurable user in-line DSP (DRUID) system carries out the signal processing tasks in hardware co-processors (CPs) implemented in an FPGA, with an embedded microprocessor (μP) for control. In the fully developed platform, users will be able to choose co-processors from a library and configure programmable parameters through the μP to meet their requirements. The DRUID system is implemented on a Spartan 6 FPGA, on the new rear transition module (RTM-T), a field upgrade to existing D-TACQ digitizers. As proof of concept, a multiply-accumulate (MAC) co-processor has been developed, which can be configured as a digital chopper-integrator for long pulse magnetic fusion devices. The DRUID platform allows users to set options for the integrator, such as the number of masking samples. Results from the digital integrator are presented for a data acquisition system with 96 channels simultaneously acquiring data at 500 kSamples/s per channel

Design considerations for a filter bank based TVWS transceiver

This paper discusses the design of a filter bank based transceiver capable of simultaneously up- or downconverting the entire TV white space (TVWS) frequency band. The spectral mask requirements favour a filter bank based approach, whereby RF sampling and the use of an FPGA for digital up- and down-conversion dictates a two-stage approach. Some of the design considerations, including filter design approaches, are discussed in this contribution

Efficient TV white space filter bank transceiver

Future devices operating in the TV white space (TVWS) spectrum will require to access different bands at different locations and times in order to avoid interference to incumbent users, requiring agility and sufficient spectral masks to satisfy regulators. Further, with very high-speed ADCs and DACs becoming reality, the purpose of this paper is to present a transceiver front-end capable of simultaneously up- and downconverting a significant portion of the UHF band. The proposed approach takes a two-stage filter-bank conversion for implementation on state-of-the-art FPGAs. We present three different parameterisations, which are compatible with the 40 TVWS channels between 470 and 790MHz in Europe, and compare them in terms of complexity and latency

Digital RF multiplexing for a TVWS transceiver implementation

Future devices operating in the TV white space (TVWS) spectrum will require to access different bands at different locations and times in order to avoid interference to incumbent users, requiring agility and sufficient spectral masks to satisfy regulators. In order to realise radio devices capable of this, we briefly review design efforts on a radio transceiver capable up- and downconverting the 40 8MHz TVWS channels residing between 470MHz and 790MHz. While we briefly address the overall proposed structure, the aim of this contribution is to address the practical issues of interfacing data conversion devices sampling at RF to state-of-the-art FPGAs which can then perform the digital operations required for up- and downconversion

TVWS filter bank transceiver on OMAP-L137 evaluation module

Communications devices operating in the TV white space (TVWS) spectrum will be strictly regulated, requiring compliance with spectral masks to protect incumbent users and sufficient frequency agility to allow access to numerous frequency bands at different times and locations. Therefore, future designs operating at radio frequency (RF) have been proposed. The purpose of this paper is to demonstrate an implementation of such a transceivers at a scale-down frequency implemented on the OMAP--L137 evaluation module, whereby the RF link can be replaced by the device's audio I/O, thus enabling easier observation and algorithm testing for students

Partially reconfigurable TVWS transceiver for use in UK and US markets

With more and more countries opening up sections of unlicensed spectrum for use by TV White Space (TVWS) devices, the prospect of building a device capable of operating in more than one world region is appealing. The difficulty is that the locations of TVWS bands within the radio spectrum are not globally harmonised. With this problem in mind, the purpose of this paper is to present a TVWS transceiver design which is capable of being reconfigured to operate in both the UK and US spectrum. We present three different configurations: one covering the UK TVWS spectrum and the remaining two covering the various locations of the US TVWS bands

Energy-efficient wideband transceiver with per-band equalisation and synchronisation

To emit in the TV white space (TVWS) spectrum, the regulator has requested very strict spectral masks, which can be fulfilled using a FFT-modulated filter-bank multi-carrier system (FBMC) to extract one or several TVWS channels in the 470--790MHz range. Such a system reduces the channel dispersion, but even with near-perfectly reconstructing filter bank, the need for equalisation and synchronisation remains. In this work, we propose a per-band equalisation and synchronisation approach, performed by a constant modulus algorithms running concurrently with a direction-directed adaptation process for faster convergence and reduced phase ambiguity. We compare symbol- and fractionally-spaced versions, and investigate their fixed-point implementation on an FPGA. We compare the performance of the different systems in terms of mean squared error, computational cost, and robustness towards noise